1. Technical Field
This disclosure relates to semiconductor fabrication and more particularly, to an improved method and apparatus for forming contacts.
2. Description of the Related Art
Contact patterning is becoming more and more difficult for lithography with decreasing groundrules. For memory and/or logic chips, such as, dynamic random access memory (DRAM) chips and embedded DRAM chips, sub-micron groundrules may be used, for example. Sub-micron line space patterns can be printed reasonably well with relatively simple image enhancement techniques (e.g., off-axis illumination).
Printing sub-micron contacts is much more difficult, however. Since contact holes are typically formed as individual holes, aberrations and interference patterns occurring during patterning make reliable formation of the contact holes difficult even if advanced techniques such as phase shift masks are used.
The alignment of contacts with conductors, such as metal lines, is important. When contacts and metal lines are smaller in size, alignment becomes even more difficult, and missing a connection between the metal line and the contact as well as shorting out a contact and a neighboring line may be more likely.
Therefore, a need exists for improved contacts for semiconductor devices wherein the contacts may be formed down to the size of the groundrules. A further need exists for a method of forming the improved contacts wherein the risk of misalignment with metal lines is reduced.